(If 'eq' is true, neither of the predicated sub instructions will execute and we fall right out of the loop.
Like cmp r1, r2 subgt r1,r1, r2 sublt r2,r2, r1 bne loop. Also, as an ARM-specific optimization, this looks like a use-case for predicated instructions. The problem is that some structures and other things may be identical for x86 and x86-64 but different for ARM so you need to find those different parts as well and change them. The process of translating one language into another is called compiling, we usually compile C/C++ into binary, but compiling to another language, be it assembly or java is also quite possible, most C/C++ toolchains allow you to compile directly to assembly however, in GCC and Clang, this is done using the -S flag. The else if part in the C source is redundant). Only works on 64bit x86 code (and the code in the else statement only on 32bit x86 code). Well yeah but you would need to change alot more things (I’ve only looked at the ftrace).įor example the branch_table would need ARM opcodes instread of x86 opcodes.Īlso like you noticed the user_regs_struct needs adjustments to be ARM compatible (usage of ARM registers instead of x86).You also need to change everything the author marked with #ifdef x86_64 as it simbolizes that the following code
